Referring to FIG. 1 showing a conventional lead frame which is employed for forming a Quad Flat Package (hereinafter, called QFP), the lead frame 2 has a hole (1a, 1b, 1c, 1d) formed in each corner surface of a rail 1 and has a thin plate shape. The lead frame 2 includes a paddle 3 formed in a center thereof and has a semiconductor chip 4 mounted on the paddle 3, multiple tiebars (5a, 5b, 5c, 5d) sustaining the paddle 3, and a plurality of leads 6 with one end of each lead approaching the paddle 3 and the other end of each lead connected to the rail 1.
A semiconductor package manufacturing process using the lead frame 2 includes a step for mounting the semiconductor chip 4 on the paddle 3 of the lead frame 2, then a step for performing a wire bonding process. The chip pads formed on the semiconductor chip 4 are connected to one end of respective ones of the plurality of leads 6 using metallic wires 7. The area including the semiconductor chip 4 and the plurality of leads 6, as shown by the broken line, are encapsulated using an epoxy molding compound. As shown in FIG. 2, the paddle 3 and the plurality of leads 6 are formed in the same plane. The reference numeral 8, referring to a line, designates a molded structure made of an epoxy molding compound.
The QFP, however, has a tendency of lacking strength in terms of the tiebars sustaining the semiconductor chip on the surface of the paddle. A semiconductor package fabricated using a lead frame for forming a QFP tends to suffer undesired paddle bending due to the pressure of the epoxy molding compound, which may occur when the fused epoxy molding compound is poured into a mold. As a result, the upper surface of a chip and/or the lower surface of the paddle may be exposed through the surface of the chip package. Further, the wire bonding in the chip package may weaken, resulting in a poor quality chip package. Moreover, the steam generated during the molding process of the semiconductor package is difficult to exhaust therefrom, and it is difficult to externally dissipate the heat generated during a mounting operation onto a printed circuit board.